INTEGRATED ENHANCEMENT-MODE AND DEPLETION-MODE FET IN MODULATION-DOPED SI SIGE HETEROSTRUCTURES/

Authors
ISMAIL K CHU JO ARAFA M
Citation
K. Ismail et al., INTEGRATED ENHANCEMENT-MODE AND DEPLETION-MODE FET IN MODULATION-DOPED SI SIGE HETEROSTRUCTURES/, IEEE electron device letters, 18(9), 1997, pp. 435-437
Citations number
5
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
IEEE electron device letters → ACNP
ISSN journal
07413106
Volume
18
Issue
9
Year of publication
1997
Pages
435 - 437
Database
ISI
SICI code
0741-3106(1997)18:9<435:IEADFI>2.0.ZU;2-6
Abstract
In this letter, we present results of enhancement and depletion mode t ransistors fabricated on the same layer structure of Si/SiGe, without using gate recess. The current in the enhancement mode device is contr olled by a pn-junction, while that of the depletion-mode device is con trolled by a Schottky barrier. A peak transconductance of 327 mS/mm an d 417 mS/mm has been achieved in 0.5-mu m gate length depletion and en hancement-mode transistors, respectively.