300-MM PREMETAL DIELECTRIC PROCESSING

The net manufacturing cost of silicon die dominates the economics of I C fabrication, The industry relentlessly pursues robust, massively par allel fabrication processes to drive the die cost down. Historically, the number of die/wafer pass is increased by reducing transistor criti cal dimensions or by introducing larger starting wafers into the fab l ine. The latter approach is more dramatic, unless the costs of new cap ital equipment and process development consume the cost advantage of a dditional silicon area. The present article reports tool performance r esults for a first pass effort at 300-mm premetal dielectric (PMD) pro cessing, including data for RTP densification of BPSG and for material s-related aspects of oxide chemical mechanical polishing (CMP). The cl osing remarks discuss the role of informal collaboration in 300-mm too l development.