A PRECISE TRANSIENT MODEL FOR DELAYED INPUT BICMOS DIGITAL CIRCUITS

A detailed methodology to perform the transient analysis of digital Bi CMOS circuits is presented. The analysis takes into account high level injection effects, the capacitances at the base, and short-channel ef fects for the MOS drain current. The model is general and its equation s are derived for delayed input signals. The effect of the input slew rate on the gate delay is evaluated. The various correlations between the device/circuit parameters and the overall delay performance are ex amined. The model predictions show excellent agreement with HSPICE sim ulated delay.