BUFFERLESS BROADCASTING - A LOW-POWER DISTRIBUTED CIRCUIT TECHNIQUE FOR BROADCASTING 10-GB S CHIP INPUT SIGNALS/

Authors
Citation
Ks. Lowe, BUFFERLESS BROADCASTING - A LOW-POWER DISTRIBUTED CIRCUIT TECHNIQUE FOR BROADCASTING 10-GB S CHIP INPUT SIGNALS/, IEEE journal of solid-state circuits, 32(10), 1997, pp. 1551-1555
Citations number
10
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
00189200
Volume
32
Issue
10
Year of publication
1997
Pages
1551 - 1555
Database
ISI
SICI code
0018-9200(1997)32:10<1551:BB-ALD>2.0.ZU;2-4
Abstract
Bufferless distributed circuit (BDC) broadcasting is proposed as a tec hnique for broadcasting high-speed chip input signals to a series of o n-chip destination cells as needed in crosspoint switch, parallel mult iplier, distributed amplifier, etc., chip designs. In contrast with co nventional techniques that use an on-chip buffer to assist broadcastin g, BDC broadcasting offers the advantage of lower signal delay and pow er dissipation. In an experimental GaAs heterojunction bipolar transis tor (HBT) 8 x 4 crosspoint switch assembly, BDC broadcasting was found to achieve a 40% power savings with little or no penalty in jitter or bit error rate performance at a 10-Gb/s data rate.