A 0.5-V MTCMOS SIMOX LOGIC GATE

This paper proposes a multithreshold CMOS (MTCMOS) circuit that uses S IMOX process technology. This MTCMOS/SIMOX circuit combines fully depl eted low-threshold CMOS logic gates and partially depleted high-thresh old power-switch transistors. The low-threshold CMOS gates have a larg e noise margin for fluctuations in operating temperature in addition t o high-speed operation at the low supply voltage of 0.5 V. The high-th reshold power-su itch transistor in which the body is connected to the gate through the reverse-diode makes it possible to obtain large chan nel conductance in the active mode without any increase of the leakage current in the sleep mode. The effectiveness of the MTCMOS/SIMOX circ uit is confirmed by an evaluation of a gate-chain test element group ( TEG) and an experimental 0.5-V, 40-MHz, 16-b ALU, which were designed and fabricated with 0.25-mu m MTCMOS/SIMOX technology.