Citation: Cv. Papadopoulos, ON THE ROUTING OF SIGNALS IN PARALLEL PROCESSOR MESHES (VOL 41, PG 171, 1996), Microprocessing and microprogramming, 41(8-9), 1996, pp. 1-1
Citation: Car. Hoare, THE LOGIC OF ENGINEERING DESIGN (REPRINTED FROM THE UNIFIED THEORIES OF PROGRAMMING, 1997), Microprocessing and microprogramming, 41(8-9), 1996, pp. 525-539
Citation: S. Gorlatch, FROM TRANSFORMATIONS TO METHODOLOGY IN PARALLEL PROGRAM-DEVELOPMENT -A CASE-STUDY, Microprocessing and microprogramming, 41(8-9), 1996, pp. 571-588
Citation: T. Rauber et G. Runger, DERIVING STRUCTURED PARALLEL IMPLEMENTATIONS FOR NUMERICAL-METHODS, Microprocessing and microprogramming, 41(8-9), 1996, pp. 589-608
Citation: Y. Arrouye, SCOPE - AN EXTENSIBLE INTERACTIVE ENVIRONMENT FOR THE PERFORMANCE EVALUATION OF PARALLEL SYSTEMS, Microprocessing and microprogramming, 41(8-9), 1996, pp. 609-623
Citation: P. Kacsuk et al., DESIGNING PARALLEL PROGRAMS BY THE GRAPHICAL LANGUAGE GRAPNEL, Microprocessing and microprogramming, 41(8-9), 1996, pp. 625-643
Citation: S. Orlando et R. Perego, EXPLOITING PARTIAL REPLICATION IN UNBALANCED PARALLEL LOOP SCHEDULINGON MULTICOMPUTERS, Microprocessing and microprogramming, 41(8-9), 1996, pp. 645-658
Citation: A. Broggi et F. Gregoretti, PERFORMANCE EVALUATION AND OPTIMIZATION IN LOW-COST CELLULAR SIMD SYSTEMS, Microprocessing and microprogramming, 41(8-9), 1996, pp. 659-678
Citation: Cv. Papadopoulos, ON THE ROUTING OF SIGNALS IN PARALLEL PROCESSOR MESHES (VOL 41, PG 171, 1996), Microprocessing and microprogramming, 41(10), 1996, pp. 1-1
Citation: W. Liu et al., MODELING AND PERFORMANCE ASSESSMENT OF LARGE ATM SWITCHING-NETWORKS ON LOOSELY-COUPLED PARALLEL PROCESSORS, Microprocessing and microprogramming, 41(10), 1996, pp. 681-689
Citation: H. Khalid, A NEURAL-NETWORK-BASED REPLACEMENT STRATEGY FOR HIGH-PERFORMANCE COMPUTER ARCHITECTURES, Microprocessing and microprogramming, 41(10), 1996, pp. 691-702
Citation: Rj. Dewhurst et Q. Shan, AN IMPROVED ALGORITHM FOR EVALUATION OF THE PRODUCT OF AN EXPONENTIALFUNCTION WITH AN ERROR FUNCTION COMPLEMENT, Microprocessing and microprogramming, 41(10), 1996, pp. 733-736
Citation: Ha. Barker et al., GRAPHICAL SIMULATOR FOR PROGRAMMABLE LOGIC CONTROLLERS BASED ON PETRINETS, Microprocessing and microprogramming, 41(10), 1996, pp. 737-756
Citation: D. Anguita et Ba. Gomes, MIXING FLOATING-POINT AND FIXED-POINT FORMATS FOR NEURAL-NETWORK LEARNING ON NEUROPROCESSORS, Microprocessing and microprogramming, 41(10), 1996, pp. 757-769
Citation: Cv. Papadopoulos, ON THE ROUTING OF SIGNALS IN PARALLEL PROCESSOR MESHES (RETRACTION OFVOL 41, PG 171, 1995), Microprocessing and microprogramming, 41(7), 1995, pp. 1-1
Citation: Rk. Arora et Vk. Khanna, DESIGN OF A KERNEL FOR IMPLEMENTING COMMUNICATION PROTOCOLS, Microprocessing and microprogramming, 41(7), 1995, pp. 469-485
Citation: E. Macii et M. Poncino, USING CONNECTIVITY AND SPECTRAL METHODS TO CHARACTERIZE THE STRUCTUREOF SEQUENTIAL LOGIC-CIRCUITS, Microprocessing and microprogramming, 41(7), 1995, pp. 487-500
Citation: Sh. Huang et al., A NEW SCHEDULING ALGORITHM FOR SYNTHESIZING THE CONTROL BLOCKS OF CONTROL-DOMINATED CIRCUITS, Microprocessing and microprogramming, 41(7), 1995, pp. 501-519