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Results: 4
OPTIMAL VLSI COMPLEXITY DESIGN FOR HIGH-SPEED PIPELINE FFT USING RNS
Authors: ALIA G MARTINELLI E
Citation: G. Alia et E. Martinelli, OPTIMAL VLSI COMPLEXITY DESIGN FOR HIGH-SPEED PIPELINE FFT USING RNS, Computers & electrical engineering, 24(3-4), 1998, pp. 167-182
LOGIC DESIGN OF A FAST CIRCUIT FOR ITERATIVE ADDITIONS IN REDUNDANT HYBRID NUMBER-SYSTEMS
Authors: ALIA G MARTINELLI E
Citation: G. Alia et E. Martinelli, LOGIC DESIGN OF A FAST CIRCUIT FOR ITERATIVE ADDITIONS IN REDUNDANT HYBRID NUMBER-SYSTEMS, Computer journal (Print), 41(1), 1998, pp. 45-51
DESIGNING MULTIOPERAND MODULAR ADDERS
Authors: ALIA G MARTINELLI E
Citation: G. Alia et E. Martinelli, DESIGNING MULTIOPERAND MODULAR ADDERS, Electronics Letters, 32(1), 1996, pp. 22-23
ON THE LOWER-BOUND TO THE VLSI COMPLEXITY OF NUMBER CONVERSION FROM WEIGHTED TO RESIDUE REPRESENTATION
Authors: ALIA G MARTINELLI E
Citation: G. Alia et E. Martinelli, ON THE LOWER-BOUND TO THE VLSI COMPLEXITY OF NUMBER CONVERSION FROM WEIGHTED TO RESIDUE REPRESENTATION, I.E.E.E. transactions on computers, 42(8), 1993, pp. 962-967
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