Authors: Yokoyama, Y Itoh, N Hasegawa, M Katayama, M Akasaki, H Kaneda, N Ueda, T Tanaka, Y Yamasaki, E Todokoro, M Toriyama, K Miki, H Yagyu, M Takashima, K Kobayashi, T Miyaoka, S Tamba, N

Citation: Y. Yokoyama et al., A 1.8-V embedded 18-Mb DRAM macro with a 9-ns RAS access time and memory-cell area efficiency of 33%, IEEE J SOLI, 36(3), 2001, pp. 503-509