Citation: M. Nekili et al., PIPELINED H-TREES FOR HIGH-SPEED CLOCKING OF LARGE INTEGRATED SYSTEMSIN PRESENCE OF PROCESS VARIATIONS, IEEE transactions on very large scale integration (VLSI) systems, 5(2), 1997, pp. 161-174
Citation: G. Bois et E. Cerny, EFFICIENT GENERATION OF DIAGONAL CONSTRAINTS FOR 2-D MASK COMPACTION, IEEE transactions on computer-aided design of integrated circuits and systems, 15(9), 1996, pp. 1119-1126