Authors: Bello, DS Tangelder, R Kerkhoff, H

Citation: Ds. Bello et al., Modeling a verification test system for mixed-signal circuits, IEEE DES T, 18(1), 2001, pp. 63-71

Authors: Snoeys, W Burns, M Campbell, M Cantatore, E Cencelli, V Dinapoli, R Heijne, E Jarron, P Lamanna, P Minervini, D Morel, M O'Shea, V Quiquempoix, V Bello, DS Van Koningsveld, B Wyllie, K

Citation: W. Snoeys et al., Pixel readout chips in deep submicron CMOS for ALICE and LHCb tolerant to 10 Mrad and beyond, NUCL INST A, 466(2), 2001, pp. 366-375

Authors: Bello, DS Nauta, B Visschers, J

Citation: Ds. Bello et al., Design of analog-to-digital converters for energy-sensitive hybrid pixel detectors, NUCL INST A, 466(1), 2001, pp. 218-225

Authors: Dinapoli, R Campbell, M Canatore, E Cencelli, V Heijne, E Jarron, P Lamanna, P O'Shea, V Quiquempoix, V Bello, DS Snoeys, W van Koningsveld, B Wyllie, K

Citation: R. Dinapoli et al., A front-end for silicon pixel detectors in ALICE and LHCb, NUCL INST A, 461(1-3), 2001, pp. 492-495