Authors: CHESEBRO DG ADKISSON JW CLARK LR ESLINGER SN FAUCHER MA HOLMES SJ MALLETTE RP NOWAK EJ SENGLE EW VOLDMAN SH WEEKS TW

Citation: Dg. Chesebro et al., OVERVIEW OF GATE LINEWIDTH CONTROL IN THE MANUFACTURE OF CMOS LOGIC CHIPS, IBM journal of research and development, 39(1-2), 1995, pp. 189-200