Authors: Park, S Das, S Dill, DL

Citation: S. Park et al., Automatic checking of aggregation abstractions through state enumeration, IEEE COMP A, 19(10), 2000, pp. 1202-1210

Authors: Chakraborty, SA Yun, KY Dill, DL

Citation: Sa. Chakraborty et al., Timing analysis of asynchronous systems using time separation of events, IEEE COMP A, 18(8), 1999, pp. 1061-1076

Authors: Yun, KY Dill, DL

Citation: Ky. Yun et Dl. Dill, Automatic synthesis of extended burst-mode circuits: Part I (specificationand hazard-free implementations), IEEE COMP A, 18(2), 1999, pp. 101-117

Authors: Yun, KY Dill, DL

Citation: Ky. Yun et Dl. Dill, Automatic synthesis of extended burst-mode circuits: Part II (automatic synthesis), IEEE COMP A, 18(2), 1999, pp. 118-132

Authors: Park, SJ Dill, DL

Citation: Sj. Park et Dl. Dill, An executable specification and verifier for relaxed memory order, IEEE COMPUT, 48(2), 1999, pp. 227-235

Authors: Chakraborty, S Dill, DL Yun, KY

Citation: S. Chakraborty et al., Min-max timing analysis and an application to asynchronous circuits, P IEEE, 87(2), 1999, pp. 332-346