Authors:
Ogiwara, R
Tanaka, S
Itoh, Y
Miyakawa, T
Takeuchi, Y
Doumae, SM
Takenaka, H
Kunishima, I
Shuto, S
Hidaka, O
Ohtsuki, S
Tanaka, S
Citation: R. Ogiwara et al., A 0.5-mu m, 3-V, 1T1C, 1-Mbit FRAM with a variable reference bit-line voltage scheme using a fatigue-free reference capacitor, IEEE J SOLI, 35(4), 2000, pp. 545-551