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Authors: HARAGUCHI Y HIROSE T UKITA M WADA T EINO M SAITO M YAMADA M YASUOKA A
Citation: Y. Haraguchi et al., A 4-MB SRAM USING A NEW HIERARCHICAL BIT-LINE ORGANIZATION UTILIZING A T-SHAPED BIT-LINE FOR A SMALL-SIZED DIE, IEICE transactions on electronics, E79C(6), 1996, pp. 743-749
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