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Results: 1-11 |
Results: 11
SPECSYN - AN ENVIRONMENT SUPPORTING THE SPECIFY-EXPLORE-REFINE PARADIGM FOR HARDWARE SOFTWARE SYSTEM-DESIGN/
Authors: GAJSKI DD VAHID F NARAYAN S GONG J
Citation: Dd. Gajski et al., SPECSYN - AN ENVIRONMENT SUPPORTING THE SPECIFY-EXPLORE-REFINE PARADIGM FOR HARDWARE SOFTWARE SYSTEM-DESIGN/, IEEE transactions on very large scale integration (VLSI) systems, 6(1), 1998, pp. 84-100
COMPONENT SELECTION FOR HIGH-PERFORMANCE PIPELINES
Authors: BAKSHI S GAJSKI DD
Citation: S. Bakshi et Dd. Gajski, COMPONENT SELECTION FOR HIGH-PERFORMANCE PIPELINES, IEEE transactions on very large scale integration (VLSI) systems, 4(2), 1996, pp. 181-194
SYSTEM-DESIGN METHODOLOGIES - AIMING AT THE 100 H DESIGN CYCLE
Authors: GAJSKI DD NARAYAN S RAMACHANDRAN L VAHID F FUNG P
Citation: Dd. Gajski et al., SYSTEM-DESIGN METHODOLOGIES - AIMING AT THE 100 H DESIGN CYCLE, IEEE transactions on very large scale integration (VLSI) systems, 4(1), 1996, pp. 70-82
PERFORMANCE EVALUATION FOR APPLICATION-SPECIFIC ARCHITECTURES
Authors: GONG J GAJSKI DD NICOLAU A
Citation: J. Gong et al., PERFORMANCE EVALUATION FOR APPLICATION-SPECIFIC ARCHITECTURES, IEEE transactions on very large scale integration (VLSI) systems, 3(4), 1995, pp. 483-490
INCREMENTAL HARDWARE ESTIMATION DURING HARDWARE SOFTWARE FUNCTIONAL PARTITIONING
Authors: VAHID F GAJSKI DD
Citation: F. Vahid et Dd. Gajski, INCREMENTAL HARDWARE ESTIMATION DURING HARDWARE SOFTWARE FUNCTIONAL PARTITIONING, IEEE transactions on very large scale integration (VLSI) systems, 3(3), 1995, pp. 459-464
SPECIFICATION AND DESIGN OF EMBEDDED HARDWARE-SOFTWARE SYSTEMS
Authors: GAJSKI DD VAHID F
Citation: Dd. Gajski et F. Vahid, SPECIFICATION AND DESIGN OF EMBEDDED HARDWARE-SOFTWARE SYSTEMS, IEEE design & test of computers, 12(1), 1995, pp. 53-67
SPECCHARTS - A VHDL FRONT-END FOR EMBEDDED SYSTEMS
Authors: VAHID F NARAYAN S GAJSKI DD
Citation: F. Vahid et al., SPECCHARTS - A VHDL FRONT-END FOR EMBEDDED SYSTEMS, IEEE transactions on computer-aided design of integrated circuits and systems, 14(6), 1995, pp. 694-706
INTRODUCTION TO HIGH-LEVEL SYNTHESIS
Authors: GAJSKI DD RAMACHANDRAN L
Citation: Dd. Gajski et L. Ramachandran, INTRODUCTION TO HIGH-LEVEL SYNTHESIS, IEEE design & test of computers, 11(4), 1994, pp. 44-54
A TRANSFORMATION-BASED METHOD FOR LOOP FOLDING
Authors: LEE TF WU ACH LIN YL GAJSKI DD
Citation: Tf. Lee et al., A TRANSFORMATION-BASED METHOD FOR LOOP FOLDING, IEEE transactions on computer-aided design of integrated circuits and systems, 13(4), 1994, pp. 439-450
LINKING REGISTER-TRANSFER AND PHYSICAL LEVELS OF DESIGN
Authors: KURDAHI FJ GAJSKI DD RAMACHANDRAN C CHAIYAKUL V
Citation: Fj. Kurdahi et al., LINKING REGISTER-TRANSFER AND PHYSICAL LEVELS OF DESIGN, IEICE transactions on information and systems, E76D(9), 1993, pp. 991-1005
COMPONENT SYNTHESIS FROM FUNCTIONAL DESCRIPTIONS
Authors: RUNDENSTEINER EA GAJSKI DD BIC L
Citation: Ea. Rundensteiner et al., COMPONENT SYNTHESIS FROM FUNCTIONAL DESCRIPTIONS, IEEE transactions on computer-aided design of integrated circuits and systems, 12(9), 1993, pp. 1287-1299
Risultati: 1-11 |