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Results:
1-7
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Results: 7
Authors:
LEUCIUC A
GORAS L
Citation: A. Leuciuc et L. Goras, NEW GENERAL IMMITTANCE CONVERTER JFET VOLTAGE-CONTROLLED IMPEDANCES AND THEIR APPLICATIONS TO CONTROLLED BIQUADS SYNTHESIS, IEEE transactions on circuits and systems. 1, Fundamental theory andapplications, 45(6), 1998, pp. 678-682
Authors:
GORAS L
CHUA LO
LEENAERTS DMW
Citation: L. Goras et al., TURING PATTERNS IN CNNS .1. ONCE OVER LIGHTLY, IEEE transactions on circuits and systems. 1, Fundamental theory andapplications, 42(10), 1995, pp. 602-611
Authors:
GORAS L
CHUA LO
Citation: L. Goras et Lo. Chua, TURING PATTERNS IN CNNS .2. EQUATIONS AND BEHAVIORS, IEEE transactions on circuits and systems. 1, Fundamental theory andapplications, 42(10), 1995, pp. 612-626
Authors:
GORAS L
CHUA LO
PIVKA L
Citation: L. Goras et al., TURING PATTERNS IN CNNS .3. COMPUTER-SIMULATION RESULTS, IEEE transactions on circuits and systems. 1, Fundamental theory andapplications, 42(10), 1995, pp. 627-637
Authors:
CHUA LO
GORAS L
Citation: Lo. Chua et L. Goras, TURING PATTERNS IN CELLULAR NEURAL NETWORKS, International journal of electronics, 79(6), 1995, pp. 719-736
Authors:
GORAS L
DAVIDEANU C
Citation: L. Goras et C. Davideanu, A CLASS OF CONSTANT ENVELOPE SHAPING FUNCTIONS, AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS, 48(1), 1994, pp. 60-62
Authors:
GORAS L
MARCUTA C
Citation: L. Goras et C. Marcuta, ON LINEAR INDUCTANCE-TIME AND CAPACITANCE-TIME CONVERSIONS USING NIC-TYPE CONFIGURATIONS, IEEE transactions on industrial electronics, 40(5), 1993, pp. 529-531
Risultati:
1-7
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