Authors: YABE T MIYANO S SATO K WADA M HAGA R WADA O ENKAKU M HOJYO T MIMOTO K TAZAWA M OHKUBO T NUMATA K

Citation: T. Yabe et al., A CONFIGURABLE DRAM MACRO DESIGN FOR 2112 DERIVATIVE ORGANIZATIONS TOBE SYNTHESIZED USING A MEMORY GENERATOR, IEEE journal of solid-state circuits, 33(11), 1998, pp. 1752-1757

Authors: MIYANO S NUMATA K SATO K YABE T WADA M HAGA R ENKAKU M SHIOCHI M KAWASHIMA Y IWASE M OHGATA M KUMAGAI J YOSHIDA T SAKURAI M KAKI S YANAGIYA N SHINYA H FURUYAMA T HANSEN P HANNAH M NAGY M NAGARAJAN A RUNGSEA M

Citation: S. Miyano et al., A 1.6 GBYTE S DATA TRANSFER RATE 8 MB EMBEDDED DRAM/, IEEE journal of solid-state circuits, 30(11), 1995, pp. 1281-1285