Authors: KARVELAS D PAPAMICHAIL M

Citation: D. Karvelas et M. Papamichail, THE NO SLOT WASTING BANDWIDTH BALANCING MECHANISM FOR DUAL BUS ARCHITECTURES, IEEE journal on selected areas in communications, 11(8), 1993, pp. 1214-1228

Authors: KARVELAS D LEONGARCIA A

Citation: D. Karvelas et A. Leongarcia, DELAY ANALYSIS OF VARIOUS SERVICE DISCIPLINES IN SYMMETRICAL TOKEN PASSING NETWORKS, IEEE transactions on communications, 41(9), 1993, pp. 1342-1355