Authors:
SOUDRIS D
POECHMUELLER P
KYRIAKISBITZAROS ED
BIRBAS M
GOUTIS C
THANAILAKIS A
Citation: D. Soudris et al., DESIGN METHODOLOGY FOR SYSTEMATIC DERIVATION OF FAULT-TOLERANT PROCESSOR ARRAY ARCHITECTURES, International journal of electronics, 84(6), 1998, pp. 615-624
Citation: Ed. Kyriakisbitzaros et al., TRANSFORMATION OF NESTED LOOPS INTO UNIFORM RECURRENCES AND THEIR MAPPING TO REGULAR PROCESSOR ARRAYS, Journal of circuits, systems, and computers, 6(3), 1996, pp. 243-265