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Results: 1
USING MODEL-CHECKING FOR TIMED AUTOMATA TO PARAMETERIZE LOGIC CONTROLPROGRAMS
Authors:
KOWALEWSKI S ENGELL S HUUCK R LAKHNECH Y LUKOSCHUS B URBINA L
Citation:
S. Kowalewski et al., USING MODEL-CHECKING FOR TIMED AUTOMATA TO PARAMETERIZE LOGIC CONTROLPROGRAMS, Computers & chemical engineering, 22, 1998, pp. 875-878
Risultati:
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