AAAAAA
Results: 26-33/33
Authors:
POMERANZ I
REDDY SM
Citation: I. Pomeranz et Sm. Reddy, ON DETERMINING SYMMETRIES IN INPUTS OF LOGIC-CIRCUITS, IEEE transactions on computer-aided design of integrated circuits and systems, 13(11), 1994, pp. 1428-1434
Authors:
POMERANZ I
REDDY SM
Citation: I. Pomeranz et Sm. Reddy, ON THE ROLE OF HARDWARE RESET IN SYNCHRONOUS SEQUENTIAL-CIRCUIT TEST-GENERATION, I.E.E.E. transactions on computers, 43(9), 1994, pp. 1100-1105
Authors:
POMERANZ I
REDDY SM
Citation: I. Pomeranz et Sm. Reddy, APPLICATION OF HOMING SEQUENCES TO SYNCHRONOUS SEQUENTIAL-CIRCUIT TESTING, I.E.E.E. transactions on computers, 43(5), 1994, pp. 569-580
Authors:
POMERANZ I
CHENG KT
Citation: I. Pomeranz et Kt. Cheng, STOIC - STATE ASSIGNMENT BASED ON OUTPUT INPUT FUNCTIONS, IEEE transactions on computer-aided design of integrated circuits and systems, 12(8), 1993, pp. 1123-1131
Authors:
POMERANZ I
REDDY LN
REDDY SM
Citation: I. Pomeranz et al., COMPACTEST - A METHOD TO GENERATE COMPACT TEST SETS FOR COMBINATIONAL-CIRCUITS, IEEE transactions on computer-aided design of integrated circuits and systems, 12(7), 1993, pp. 1040-1049
Authors:
POMERANZ I
REDDY SM
Citation: I. Pomeranz et Sm. Reddy, 3-WEIGHT PSEUDORANDOM TEST-GENERATION BASED ON A DETERMINISTIC TEST SET FOR COMBINATIONAL AND SEQUENTIAL-CIRCUITS, IEEE transactions on computer-aided design of integrated circuits and systems, 12(7), 1993, pp. 1050-1058
Authors:
POMERANZ I
REDDY SM
Citation: I. Pomeranz et Sm. Reddy, CLASSIFICATION OF FAULTS IN SYNCHRONOUS SEQUENTIAL-CIRCUITS, I.E.E.E. transactions on computers, 42(9), 1993, pp. 1066-1077
Authors:
POMERANZ I
REDDY SM
Citation: I. Pomeranz et Sm. Reddy, TESTING OF FAULT-TOLERANT HARDWARE THROUGH PARTIAL CONTROL OF INPUTS, I.E.E.E. transactions on computers, 42(10), 1993, pp. 1267-1271