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Results: 1-3 |
Results: 3
TRACE FACTORY - GENERATING WORKLOADS FOR TRACE-DRIVEN SIMULATION OF SHARED-BUS MULTIPROCESSORS
Authors: GIORGI R PRETE CA PRINA G RICCIARDI L
Citation: R. Giorgi et al., TRACE FACTORY - GENERATING WORKLOADS FOR TRACE-DRIVEN SIMULATION OF SHARED-BUS MULTIPROCESSORS, IEEE concurrency, 5(4), 1997, pp. 54
A TRACE-DRIVEN SIMULATOR FOR PERFORMANCE EVALUATION OF CACHE-BASED MULTIPROCESSOR SYSTEMS
Authors: PRETE CA PRINA G RICCIARDI L
Citation: Ca. Prete et al., A TRACE-DRIVEN SIMULATOR FOR PERFORMANCE EVALUATION OF CACHE-BASED MULTIPROCESSOR SYSTEMS, IEEE transactions on parallel and distributed systems, 6(9), 1995, pp. 915-929
A SELECTIVE INVALIDATION STRATEGY FOR CACHE COHERENCE
Authors: PRETE CA PRINA G RICCIARDI L
Citation: Ca. Prete et al., A SELECTIVE INVALIDATION STRATEGY FOR CACHE COHERENCE, IEICE transactions on information and systems, E78D(10), 1995, pp. 1316-1320
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