AAAAAA

   
Results: 1-2 |
Results: 2
Design-for-testability techniques for detecting delay faults in CMOS/BiCMOS logic families
Authors: Raahemifar, K Ahmadi, M
Citation: K. Raahemifar et M. Ahmadi, Design-for-testability techniques for detecting delay faults in CMOS/BiCMOS logic families, IEEE CIR-II, 47(11), 2000, pp. 1279-1290
Novel test generation algorithm for combination circuits
Authors: Raahemifar, K Ahmadi, M
Citation: K. Raahemifar et M. Ahmadi, Novel test generation algorithm for combination circuits, J CIR SYS C, 10(1-2), 2000, pp. 27-65
Risultati: 1-2 |