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Results: 3
DESIGN AND IMPLEMENTATION OF THE PAPRICA PARALLEL ARCHITECTURE
Authors:
BROGGI A CONTE G GREGORETTI F SANSOE C PASSERONE R REYNERI LM
Citation:
A. Broggi et al., DESIGN AND IMPLEMENTATION OF THE PAPRICA PARALLEL ARCHITECTURE, Journal of VLSI signal processing, 19(1), 1998, pp. 5-18
THE EVOLUTION OF THE PAPRICA SYSTEM
Authors:
BROGGI A CONTE G GREGORETTI F SANSOE C REYNERI LM
Citation:
A. Broggi et al., THE EVOLUTION OF THE PAPRICA SYSTEM, Integrated computer-aided engineering, 4(2), 1997, pp. 114-136
VERY FAST CMOS GLITCH DETECTOR
Authors:
REYNERI LM SANSOE C
Citation:
Lm. Reyneri et C. Sansoe, VERY FAST CMOS GLITCH DETECTOR, Electronics Letters, 29(2), 1993, pp. 185-187
Risultati:
1-3
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