Authors: SENTHINATHAN R MEHRA A MAHALINGAM M DOI Y ASTRAIN H

Citation: R. Senthinathan et al., ELECTRICAL PACKAGING REQUIREMENTS FOR LOW-VOLTAGE ICS - 3.3 V HIGH-PERFORMANCE CMOS DEVICES AS A CASE-STUDY, IEEE transactions on components, packaging, and manufacturing technology. Part B, Advanced packaging, 17(4), 1994, pp. 493-504

Authors: SENTHINATHAN R CANGELLARIS AC PRINCE JL

Citation: R. Senthinathan et al., REFERENCE PLANE PARASITICS MODELING AND THEIR CONTRIBUTION TO THE POWER AND GROUND PATH EFFECTIVE INDUCTANCE AS SEEN BY THE OUTPUT DRIVERS, IEEE transactions on microwave theory and techniques, 42(9), 1994, pp. 1765-1773

Authors: SENTHINATHAN R NIMMAGADDA S PRINCE JL CANGELLARIS AC

Citation: R. Senthinathan et al., MODELING AND SIMULATION OF COUPLED TRANSMISSION-LINE INTERCONNECTS OVER A NOISY REFERENCE PLANE, IEEE transactions on components, hybrids, and manufacturing technology, 16(7), 1993, pp. 705-713

Authors: SENTHINATHAN R PRINCE JL CANGELLARIS AC

Citation: R. Senthinathan et al., MODULE FREQUENCY ESTIMATION AND NOISE BUDGET LIMITATIONS - TRADE-OFFSIN MULTICHIP MODULES AS A FUNCTION OF CMOS CHIPS INTEGRATION, IEEE transactions on components, hybrids, and manufacturing technology, 16(5), 1993, pp. 478-483

Authors: SENTHINATHAN R PRINCE JL

Citation: R. Senthinathan et Jl. Prince, APPLICATION-SPECIFIC CMOS OUTPUT DRIVER CIRCUIT-DESIGN TECHNIQUES TO REDUCE SIMULTANEOUS SWITCHING NOISE, IEEE journal of solid-state circuits, 28(12), 1993, pp. 1383-1388