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Results:
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Results: 16
Authors:
TONGSIMA S
CHANTRAPORNCHAI C
SHA EHM
PASSOS NL
Citation: S. Tongsima et al., REDUCING DATA HAZARDS ON MULTI-PIPELINED DSP ARCHITECTURE WITH LOOP SCHEDULING, Journal of VLSI signal processing systems for signal, image, and video technology, 18(2), 1998, pp. 111-123
Authors:
CHANDRAKASAN A
SHA EHM
Citation: A. Chandrakasan et Ehm. Sha, SPECIAL SECTION ON LOW-POWER ELECTRONICS AND DESIGN, IEEE transactions on very large scale integration (VLSI) systems, 6(4), 1998, pp. 518-519
Authors:
PASSOS NL
SHA EHM
Citation: Nl. Passos et Ehm. Sha, SCHEDULING OF UNIFORM MULTIDIMENSIONAL SYSTEMS UNDER RESOURCE CONSTRAINTS, IEEE transactions on very large scale integration (VLSI) systems, 6(4), 1998, pp. 719-730
Authors:
WANG JQY
SHA EHM
PASSOS NL
Citation: Jqy. Wang et al., MINIMIZATION OF MEMORY ACCESS OVERHEAD FOR MULTIDIMENSIONAL DSP APPLICATIONS VIA MULTILEVEL PARTITIONING AND SCHEDULING, IEEE transactions on circuits and systems. 2, Analog and digital signal processing, 44(9), 1997, pp. 741-753
Authors:
TONGSIMA S
SHA EHM
PASSOS NL
Citation: S. Tongsima et al., COMMUNICATION-SENSITIVE LOOP SCHEDULING FOR DSP APPLICATIONS, IEEE transactions on signal processing, 45(5), 1997, pp. 1309-1322
Authors:
CHAO LF
SHA EHM
Citation: Lf. Chao et Ehm. Sha, SCHEDULING DATA-FLOW GRAPHS VIA RETIMING AND UNFOLDING, IEEE transactions on parallel and distributed systems, 8(12), 1997, pp. 1259-1267
Authors:
CHAO LF
LAPAUGH AS
SHA EHM
Citation: Lf. Chao et al., ROTATION SCHEDULING - A LOOP PIPELINING ALGORITHM, IEEE transactions on computer-aided design of integrated circuits and systems, 16(3), 1997, pp. 229-239
Authors:
PASSOS NL
SHA EHM
CHAO LF
Citation: Nl. Passos et al., MULTIDIMENSIONAL INTERLEAVING FOR SYNCHRONOUS CIRCUIT-DESIGN OPTIMIZATION, IEEE transactions on computer-aided design of integrated circuits and systems, 16(2), 1997, pp. 146-159
Authors:
SHELIGA M
SHA EHM
Citation: M. Sheliga et Ehm. Sha, HARDWARE SOFTWARE CO-DESIGN WITH THE HMS FRAMEWORK/, Journal of VLSI signal processing systems for signal, image, and video technology, 13(1), 1996, pp. 37-56
Authors:
PASSOS NL
SHA EHM
Citation: Nl. Passos et Ehm. Sha, SYNCHRONOUS CIRCUIT OPTIMIZATION VIA MULTIDIMENSIONAL RETIMING, IEEE transactions on circuits and systems. 2, Analog and digital signal processing, 43(7), 1996, pp. 507-519
Authors:
PASSOS NL
SHA EHM
BASS SC
Citation: Nl. Passos et al., OPTIMIZING DSP FLOW-GRAPHS VIA SCHEDULE-BASED MULTIDIMENSIONAL RETIMING, IEEE transactions on signal processing, 44(1), 1996, pp. 150-155
Authors:
PASSOS NL
SHA EHM
Citation: Nl. Passos et Ehm. Sha, ACHIEVING FULL PARALLELISM USING MULTIDIMENSIONAL RETIMING, IEEE transactions on parallel and distributed systems, 7(11), 1996, pp. 1150-1163
Authors:
WANG WY
PASSOS NL
SHA EHM
Citation: Wy. Wang et al., OPTIMAL DATA SCHEDULING FOR UNIFORM MULTIDIMENSIONAL APPLICATIONS, I.E.E.E. transactions on computers, 45(12), 1996, pp. 1439-1444
Authors:
CHAO LF
SHA EHM
Citation: Lf. Chao et Ehm. Sha, STATIC SCHEDULING FOR SYNTHESIS OF DSP ALGORITHMS ON VARIOUS MODELS, Journal of VLSI signal processing, 10(3), 1995, pp. 207-223
Authors:
SHA EHM
STEIGLITZ K
Citation: Ehm. Sha et K. Steiglitz, MAINTAINING BIPARTITE MATCHINGS IN THE PRESENCE OF FAILURES, Networks, 23(5), 1993, pp. 459-471
Authors:
SHA EHM
STEIGLITZ K
Citation: Ehm. Sha et K. Steiglitz, RECONFIGURABILITY AND RELIABILITY OF SYSTOLIC WAVE-FRONT ARRAYS, I.E.E.E. transactions on computers, 42(7), 1993, pp. 854-862
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