Authors: Stasiak, DL Mounes-Toussi, F Storino, SN

Citation: Dl. Stasiak et al., A 440-ps 64-bit adder in 1.5-V/0.18-mu m partially deleted SOI technology, IEEE J SOLI, 36(10), 2001, pp. 1546-1552

Authors: Aipperspach, AG Allen, DH Cox, DT Phan, NV Storino, SN

Citation: Ag. Aipperspach et al., A 0.2-mu m, 1.8-V, SOI, 550-MHz, 64-b PowerPC microprocessor with copper interconnects, IEEE J SOLI, 34(11), 1999, pp. 1430-1435