Authors: Stroele, AP Tarnick, S

Citation: Ap. Stroele et S. Tarnick, Embedded checker architectures for cyclic and low-cost arithmetic codes, J ELEC TEST, 16(4), 2000, pp. 355-367

Authors: Stroele, AP

Citation: Ap. Stroele, Signature analysis for test responses of sequential circuits, VLSI DESIGN, 10(2), 1999, pp. 127-141