Authors:
TONGSIMA S
CHANTRAPORNCHAI C
SHA EHM
PASSOS NL
Citation: S. Tongsima et al., REDUCING DATA HAZARDS ON MULTI-PIPELINED DSP ARCHITECTURE WITH LOOP SCHEDULING, Journal of VLSI signal processing systems for signal, image, and video technology, 18(2), 1998, pp. 111-123
Citation: S. Tongsima et al., COMMUNICATION-SENSITIVE LOOP SCHEDULING FOR DSP APPLICATIONS, IEEE transactions on signal processing, 45(5), 1997, pp. 1309-1322