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Results:
1-8
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Results: 8
Authors:
Strehl, K
Thiele, L
Gries, M
Ziegenbein, D
Ernst, R
Teich, J
Citation: K. Strehl et al., FunState - An internal design representation for codesign, IEEE VLSI, 9(4), 2001, pp. 524-544
Authors:
Teich, J
Fekete, SP
Schepers, J
Citation: J. Teich et al., Optimization of dynamic hardware reconfigurations, J SUPERCOMP, 19(1), 2001, pp. 57-75
Authors:
Zitzler, E
Teich, J
Bhattacharyya, SS
Citation: E. Zitzler et al., Multidimensional exploration of software implementations for DSP algorithms, J VLSI S P, 24(1), 2000, pp. 83-98
Authors:
Zitzler, E
Teich, J
Bhattacharyya, SS
Citation: E. Zitzler et al., Evolutionary algorithms for the synthesis of embedded software, IEEE VLSI, 8(4), 2000, pp. 452-456
Authors:
Teich, J
Korhonen, P
Wallenius, H
Wallenius, J
Citation: J. Teich et al., Conducting dyadic multiple issue negotiation experiments: Methodological recommendations, GR DECIS N, 9(4), 2000, pp. 347-354
Authors:
Teich, J
Wallenius, H
Wallenius, J
Citation: J. Teich et al., World-Wide-Web technology in support of negotiation and communication, INT J TEC M, 17(1-2), 1999, pp. 223-239
Authors:
Teich, J
Wallenius, H
Wallenius, J
Citation: J. Teich et al., Multiple-issue auction and market algorithms for the world wide web, DECIS SUP S, 26(1), 1999, pp. 49-66
Authors:
Ehtamo, H
Hamalainen, RP
Heiskanen, P
Teich, J
Verkama, M
Zionts, S
Citation: H. Ehtamo et al., Generating pareto solutions in a two-party setting: Constraint proposal methods, MANAG SCI, 45(12), 1999, pp. 1697-1709
Risultati:
1-8
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