Authors:
VANDERPOL JA
GERRITSEN HJ
RONGEN RTH
GROENEVELD PPMC
RAGAY PW
VANDENHURK HA
Citation: Ja. Vanderpol et al., RELIABILITY ISSUES IN 650V HIGH-VOLTAGE BIPOLAR-CMOS-DMOS INTEGRATED-CIRCUITS, Microelectronics and reliability, 37(10-11), 1997, pp. 1723-1726
Citation: Ja. Vanderpol et al., RELATION BETWEEN YIELD AND RELIABILITY OF INTEGRATED-CIRCUITS AND APPLICATION TO FAILURE RATE ASSESSMENT AND REDUCTION IN THE ONE DIGIT FITAND PPM RELIABILITY ERA, Microelectronics and reliability, 36(11-12), 1996, pp. 1603-1610