RELATION BETWEEN YIELD AND RELIABILITY OF INTEGRATED-CIRCUITS AND APPLICATION TO FAILURE RATE ASSESSMENT AND REDUCTION IN THE ONE DIGIT FITAND PPM RELIABILITY ERA
Ja. Vanderpol et al., RELATION BETWEEN YIELD AND RELIABILITY OF INTEGRATED-CIRCUITS AND APPLICATION TO FAILURE RATE ASSESSMENT AND REDUCTION IN THE ONE DIGIT FITAND PPM RELIABILITY ERA, Microelectronics and reliability, 36(11-12), 1996, pp. 1603-1610
Clear relations have been established between E-sort yield and burn-in
, EFR and field failure rates for nearly 50 million high volume produc
ts in bipolar, CMOS and BICMOS technologies from different waferfabs.
The correlations obey a simple model that assumes that the reliability
defect density is a fraction of the waferfab defect density and that
rootcauses of failures are the same. The model allows a die size indep
endent prediction and assessment of FIT and PPM reliability levels of
an IC just based on its yield, eliminating the need for excessive life
testing. 'Maverick' batches are identified by more than 2 to 3 rejects
per batch and can not be eliminated by scrap of low yielding wafers a
lone. For non-mature technologies only correlations with functional yi
eld are found, the parametric yield loss can be disregarded. Using the
results, it is shown how reliability can be improved in a fast and co
ntrolled way, even in the 1 digit:FIT and PPM reliability era, by redu
cing waferfab defect density, elimination of special causes and implem
entation of screens at product test like voltage screen and Iddq testi
ng. As the effect of yield on PPM reject level is not that strong, the
latter approach can be very effective in improving reliability. Copyr
ight (C) 1996 Elsevier Science Ltd