Authors:
Voldman, S
Anderson, W
Ashton, R
Chaine, M
Duvvury, C
Maloney, T
Worley, E
Citation: S. Voldman et al., Strategy for characterization and evaluation of ESD robustness of CMOS semiconductor technologies, MICROEL REL, 41(3), 2001, pp. 335-348
Authors:
Voldman, S
Hui, D
Warriner, L
Young, D
Howard, J
Assaderaghi, F
Shahidi, G
Citation: S. Voldman et al., Electrostatic discharge (ESD) protection in silicon-on-insulator (SOI) CMOS technology with aluminum and copper interconnects in advanced microprocessor semiconductor chips, J ELECTROST, 49(3-4), 2000, pp. 151-168