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Results: 1
PMD mitigation at 10Gbit/s using linear and nonlinear integrated electronic equaliser circuits
Authors:
Bulow, H Buchali, F Baumert, W Ballentin, R Wehren, T
Citation:
H. Bulow et al., PMD mitigation at 10Gbit/s using linear and nonlinear integrated electronic equaliser circuits, ELECTR LETT, 36(2), 2000, pp. 163-164
Risultati:
1-1
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