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Results:
1-10
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Results: 10
Authors:
Lee, SJ
Yew, PC
Citation: Sj. Lee et Pc. Yew, On table bandwidth and its update delay for value prediction on wide-issueILP processors, IEEE COMPUT, 50(8), 2001, pp. 847-852
Authors:
Cho, S
Yew, PC
Lee, G
Citation: S. Cho et al., A high-bandwidth memory pipeline for wide issue processors, IEEE COMPUT, 50(7), 2001, pp. 709-723
Authors:
Choi, L
Yew, PC
Citation: L. Choi et Pc. Yew, Compiler analysis for cache coherence: Interprocedural array data-flow analysis and its impact on cache performance, IEEE PARALL, 11(9), 2000, pp. 879-896
Authors:
Choi, L
Yew, PC
Citation: L. Choi et Pc. Yew, Hardware and compiler-directed cache coherence in large-scale multiprocessors: Design considerations and performance study, IEEE PARALL, 11(4), 2000, pp. 375-394
Authors:
Kazi, IH
Jose, DP
Ben-Hamida, B
Hescott, CJ
Kwok, C
Konstan, JA
Lilja, DJ
Yew, PC
Citation: Ih. Kazi et al., JaViz: A client/server Java profiling tool, IBM SYST J, 39(1), 2000, pp. 96-117
Authors:
Tsai, JY
Yew, PC
Citation: Jy. Tsai et Pc. Yew, Enhancing multiple-path speculative execution with predicate window shifting, J SYST ARCH, 45(12-13), 1999, pp. 1075-1095
Authors:
Chen, DK
Yew, PC
Citation: Dk. Chen et Pc. Yew, Redundant synchronization elimination for DOACROSS loops, IEEE PARALL, 10(5), 1999, pp. 459-470
Authors:
Li, ZY
Yew, PC
Citation: Zy. Li et Pc. Yew, Special Issue on Compilers and Languages for Parallel and Distributed Computers - Introduction, IEEE PARALL, 10(2), 1999, pp. 97-98
Authors:
Tsai, JY
Jiang, ZZ
Yew, PC
Citation: Jy. Tsai et al., Compiler techniques for the superthreaded architectures, INT J P PRO, 27(1), 1999, pp. 1-19
Authors:
Tsai, JY
Huang, J
Amlo, C
Lilja, DJ
Yew, PC
Citation: Jy. Tsai et al., The superthreaded processor architecture, IEEE COMPUT, 48(9), 1999, pp. 881-902
Risultati:
1-10
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