T. Yamada et al., DRIVING VOLTAGE REDUCTION IN A 2-PHASE CCD BY SUPPRESSION OF POTENTIAL POCKETS IN INTER-ELECTRODE GAPS, I.E.E.E. transactions on electron devices, 44(10), 1997, pp. 1580-1587
This study reports an optimum design for a two-phase charge-coupled de
vice (CCD) and limitations on its driving voltage reduction, The two-p
hase CCD to be used as a horizontal-CCD (H-CCD) in a CCD image sensor
requires low-voltage and high-speed operation, Reducing the driving vo
ltage, however, may induce potential pockets in the channel under the
interelectrode gaps which results in a fatal decrease in charge-transf
er efficiency. In this case it is necessary to optimize the CCD design
to be free of pocket generation. For this requirement, we conducted t
wo-dimensional (2-D) device simulations for the two-phase CCD, whose p
otential barriers are formed by boron ion-implantation. Our simulation
s indicated that tile edge position of the potential barrier region an
d time dose of boron-ion implantation would he important parameters fo
r controlling the size of potential pockets. At an optimum edge positi
on and a boron dose, minimum driving voltage appears to be reducible t
o 1.1 V. Characteristics of potential pockets and methods of their sup
pression are also discussed.