In this paper, ave discuss the design, design issues, fabrication, and
performance of a 2048 x 2048 active pixel image sensor in a 0.5-mu m
standard CMOS process. Each pixel, 7.5 x 7.5 mu m(2), consist of three
transistors and a photo diode, resulting in a 12-million transistor c
hip with a die size of 16.3 x 16.5 mm. The pixel has a nonintegrating
direct readout architecture, with a logarithmic light-to-voltage conve
rsion. This allows the array to he fully random accessible, both in sp
ace and time. The sensor has eight analog outputs, each with a pixel r
ate of 4.5 MHz, which implies a maximum frame rate of eight full frame
s per second. Sub-sampling or windowing retakes higher frame rates pos
sible. The yield of the senses is high if one accepts a small number o
f bad pixels.