We propose a novel integration of image compression and sensing in ord
er to enhance the performance of an image sensor. By integrating a com
pression function onto the sensor focal plane, the image signal to be
read out from the sensor is significantly reduced and the pixel rate o
f the sensor can consequently be increased. The potential applications
of the proposed sensor are in high pixel-rate imaging, such as high f
rame-rate image sensing and high-resolution image sensing. The compres
sion scheme we employ is a conditional replenishment, which detects an
d encodes moving areas. In this paper, we introduce two architectures
for on-sensor compression; one is the pixel parallel approach and the
other is the column parallel approach. We prototyped a VLSI chip of th
e proposed sensor based on the pixel parallel architecture. We show th
e design and describe the results of the experiments obtained by the p
rototype chip.