HOT-CARRIER DEGRADATION AND OXIDE CHARGE BUILDUP IN SELF-ALIGNED ETCHED-POLYSILICON NPN BIPOLAR-TRANSISTORS

The aim of this work is to present the results of several accelerated tests performed on self-aligned, etched-polysilicon, npn bipolar trans istors with silicon dioxide emitter spacers, and to propose a new tech nique for the characterization of the electric field at the periphery (that is, at the interface between silicon and the silicon dioxide spa cer) of the base-emitter junction, Tests are performed reverse-biasing at constant current the base-emitter junction (with floating collecto r) both in the tunneling and avalanche regime, The results are found t o be in good agreement with existing degradation models, and show that degradation kinetics may depend to some extent on device layout, part icularly in avalanche regime, The influence of charge injection in the oxide on degradation kinetics is also analyzed and compared to the pr edictions of an existing model, To this aim, a new method for estimati ng charge injection in the oxide is proposed; the method consists in e valuating the decrease of the electric field at the periphery of the d evice by measuring the temperature dependence of the tunneling compone nt of reverse base current. The electric field behavior is then compar ed to the degradation dependence on stress time in the different stres s regimes.