SELF-ALIGNED METAL IDP SI BIPOLAR TECHNOLOGY WITH 12-PS ECL AND 45-GHZ DYNAMIC FREQUENCY-DIVIDER/

Ultra-high-speed operation using a self-aligned stacked metal/in situ doped poly-Si (IDP) (referred to as SMI) Si bipolar transistor technol ogy that offers low base resistance while keeping collector capacitanc e low is demonstrated, This SMI technology provides a base electrode c onsisting of metal and in situ boron-doped poly-Si (IBDP), Here, metal is fully stacked on the IBDP by using selective tungsten CVD in the s elf-aligned manner, which means that the structure has low sheet resis tance and the fabrication process has a small thermal budget. Thus, lo w base resistance and low collector capacitance can be achieved, Three types of base electrode, an IBDP, a partially stacked SMI, and a full y stacked SMI, were fabricated to investigate the usefulness of this S MI technology and the importance of the low base resistance, Using the SMI technology, the base resistance was reduced to about 40% and the maximum oscillation frequency was raised by about 30% with respect to the conventional poly-Si base electrode, This technology makes it poss ible to obtain ultra-high-speed operation with a 12-ps gate-delay emit ter-coupled logic (ECL) circuit, and with 45-GHz-dynamic and 28-GHz-st atic frequency dividers, even when using a conventional ion-implanted base.