T. Onai et al., 12-PS ECL USING LOW-BASE-RESISTANCE SI BIPOLAR-TRANSISTOR BY SELF-ALIGNED METAL IDP TECHNOLOGY/, I.E.E.E. transactions on electron devices, 44(12), 1997, pp. 2207-2212
A self-aligned metal/IDP (SMI) technology is proposed to reduce the ex
ternal base resistance and to enable fabrication of high-speed bipolar
transistors. This SMI technology produces a self-aligned base electro
de of stacked layers of metal and in situ-doped poly-Si (IDP) with a s
mall thermal budget by selective tungsten CVD. It provides the low bas
e resistance and a shallow link base for the small-collector capacitan
ce and the high-cutoff frequency, The base resistance is reduced to a
half that in a transistor having a conventional poly-Si base electrode
. A maximum oscillation frequency of 81 GHz and a 12.2-ps gate delay t
ime in an ECL ring oscillator at a voltage swing of 250 mV were achiev
ed by using the SMI technology even with an ion-implanted base.