A BREAKDOWN VOLTAGE MODEL FOR IMPLANTED RESURF P-LDMOS DEVICE ON N(+)BURIED LAYER

Authors
ZHOU MJ VANCALSTER A
Citation
Mj. Zhou et A. Vancalster, A BREAKDOWN VOLTAGE MODEL FOR IMPLANTED RESURF P-LDMOS DEVICE ON N(+)BURIED LAYER, Solid-state electronics, 37(7), 1994, pp. 1383-1385
Citations number
6
Categorie Soggetti
Engineering, Eletrical & Electronic","Physics, Applied","Physics, Condensed Matter
Journal title
Solid-state electronics → ACNP
ISSN journal
00381101
Volume
37
Issue
7
Year of publication
1994
Pages
1383 - 1385
Database
ISI
SICI code
0038-1101(1994)37:7<1383:ABVMFI>2.0.ZU;2-5
Abstract
This paper presents an analytical expression of the breakdown voltage of a high voltage implanted RESURF p-LDMOS device which uses the n+ bu ried layer as an effective device substrate. In this model, the doping profile of the buried layer is considered and discussed. The implant dose for the drift region to implement the RESURF principle is also de scribed by this model. Results calculated from this model are verified by experimental values.