An analytical model of hole confinement gate voltage range is derived
for SiGe-channel p-MOSFETs and verified by SEDAN-3 simulation. The hol
e confinement gate voltage range is shown to be a function of threshol
d voltage, gate oxide thickness to Si cap thickness ratio, gate materi
al, and Ge mole fraction. Si cap should be thinned with device scaling
and power supply decreasing to keep the same hole confinement so as t
o realise full bias range SiGe-channel operation. It is clarified that
various bulk and SOI SiGe p-MOSFETs have the same hole confinement un
der the same threshold voltage.