Field-programmable gate arrays (FPGA's) are an important implementatio
n medium for digital logic, Unfortunately, they currently suffer from
poor silicon area utilization due to routing constraints, In this pape
r we present Triptych, an FPGA architecture designed to achieve improv
ed logic density with competitive performance, This is done by allowin
g a permapping tradeoff between logic and routing resources, and with
a routing scheme designed to match the structure of typical circuits,
We show that, using manual placement, this architecture yields a logic
density improvement of up to a factor of 3.5 over commercial FPGA's,
with comparable performance, We also describe Montage, the first FPGA
architecture to fully support asynchronous and synchronous interface c
ircuits.