Asynchronous circuit design has been studied for decades, but it has o
nly recently been feasible to construct large and efficient asynchrono
us systems. The inherent differences between asynchronous and synchron
ous circuits, primarily that asynchronous circuits do not have a globa
l clock, necessitate a review of the testing techniques used for synch
ronous circuits and a re-evaluation of the trade-offs involved. This p
aper surveys different techniques for checking whether an asynchronous
circuit has fabrication defects. These techniques include approaches
to self-checking design, methods for test generation, design for testa
bility, and delay test of asynchronous circuits.