EFFECTS OF TECHNOLOGY MAPPING ON FAULT-DETECTION COVERAGE IN REPROGRAMMABLE FPGAS

Although field-programmable gale arrays (FPGAs) are tested by their ma nufacturers prior to shipment, they are still susceptible to failures in the field, In this paper test vectors generated for the emulated (i .e. mission) circuit are fault-simulated on two different models: the original view of the circuit, and the design as it is mapped to the FP GA's logic cells, Faults in the cells and in the programming logic are considered. Experiments show that this commonly-used approach fails t o detect most of the faults in the FPGA.