Difficulties with the incorporation of SiGe epitaxial growth technolog
ies into established silicon whole wafer processes are delaying the co
mmercialisation of SiGe technology. In this paper the possibility of u
sing an alternative, well proven technology, namely ion implantation,
is considered. Experiments reported in the literature suggest that bot
h strained and relaxed device worthy SiGe layers, with graded interfac
es, can be synthesised by Ge+ ion implantation followed by a two step
thermal anneal to achieve solid phase epitaxial growth and annihilatio
n of electrically active defects. It is concluded that for specific de
vice architectures both heterojunction bipolar and MOS devices could b
e commercially realised whilst other applications, such as buried SiGe
waveguides and devices incorporating compositionally graded layers, m
ay also be viable. The technology warrants further investigation.