A new algorithm for the estimation of the minimum cost path between a
pair of points on a binary map and it's VLSI implementation, using a n
ew, multi-state, 2-D Cellular Automata (CA) architecture, are presente
d in this paper. The main advantages of the proposed architecture, whe
n compared to already existing ones, are that storage requirements are
reduced to a minimum and the speed of operation is very high, since n
o internal memory transfer operations are required. A 4X4 module was d
esigned to serve as the basic building block for the implementation of
larger dimension architectures. The die size for this module is 5.81
mm 5.45 mm = 31.69 mm(2) and the speed of operation is 45 MHz.