ELECTRON-BEAM LITHOGRAPHY FOR ADVANCED DEVICE PROTOTYPING - PROCESS TOOL METROLOGY

Direct write electron-beam lithography is the most flexible technique for sub-0.25 mum imaging in an advanced development environment. The r esolution and custom exposure capabilities of electron-beam lithograph y, as well as the rapid turnaround for new device designs, provide ear ly device/technology feasibility demonstration, learning, and proof-of -concept not easily obtainable with other lithographies. We have used a 50 kV shaped-beam system for advanced complementary metal-oxide-semi conductor (CMOS), bipolar, BiCMOS, and DRAM device prototyping as well as for front-end and back-end process development, metrology standard fabrication, exploratory device fabrication, and x-ray mask fabricati on. The high throughput, as compared to vector scan systems, of shaped -beam electron-beam lithography was found to be essential in satisfyin g the requirements of advanced development programs. The key to succes s has been a complete understanding and integration of the interaction of the resist process, tool, proximity correction, and metrology at 0 .25 mum and below. In this article, we will describe the processes use d to obtain minimum dimensions down to 0.1 mum in negative and positiv e resists with 3sigma linewidth variation typically better than 0.025 mum. Accurate and precise scanning electron microscopy metrology will be shown to be critical for process development and inspection of devi ce wafers. In addition, tool set-up techniques and proximity correctio n for sub-0.25 mum lithography will be discussed. Working room tempera ture CMOS devices and circuits, with physical gate widths as small as 0.1 mum, have been fabricated using e-beam lithography for the critica l gate level and optical lithography for all other levels. A mixed lit hography approach was found to be the most effective use of the e-beam , lithography capabilities.