This article describes the fabrication of single crystal silicon field
emission tip arrays. Each array consists of 2500 tips. We used 4 in.
(100) oriented n type silicon wafers 0.008 - 0.020 Omega cm, Sb doped.
The tips were formed using a RIE process. We achieved crystalline emi
tter tip radiuses of 1.5 - 2 nm. The extraction yid is a self aligned,
sputter deposited Ti-0.1 W-0.9 film. The radiuses of the extraction g
rid apertures range from 300 to 150 nm and have a tip to tip spacing f
rom 10 to 5 mu m. The testing was done in vacuum with a distance of 50
0 mu m between extraction grid and anode. We have seen maximum stable
array currents up to 2 mu A An anode current of 10 nA was initially de
tected at minimal gate bias of about 14 V.